PLC MELSEC-L Series Sequencer CPU
Brand :
MITSUBISHI
Caution
- This product belongs in RoHS Directive under Category 9 "Monitoring and control equipment" with exclusion from the usage restriction of phthalate esters until 21 July 2021.
Product Description
- PLC MELSEC-L Series by Mitsubishi electric.
- Easy setup of built-in I/O functions by setting parameters using the programming tool.
- Built-in CPU positioning control function.
- Make highly accurate measurements with a resolution of 5 μs.
- High precision PWM (pulse width modulation) control up to 200 kHz.
- Use the USB 2.0 interface or Ethernet to connect directly at the instillation site.
- CPU with built-in CC-Link network connectivity.
- Save/load programs directly into the Programmable Controller.
MELSEC-L Series Sequencer CPU Specifications
L26CPU
L26CPU image
L26CPU Performance Specifications
| Control Method | Stored Program Repeating Operation | ||
|---|---|---|---|
| Input/Output Control Method | Refresh Method (Direct access input/output is possible by specifying the direct access input/output (DX, DY).) | ||
| Programming Language | Sequence Control Language | Relay symbol language, Logic symbolic language, MELSAP3 (SFC), MELSAP-L, Function block, Structured text (ST) | |
| Processing Speed | Sequence Instruction | LD X0 | 9.5 ns |
| MOV D0 D1 | 19 ns | ||
| Constant Scan | 0.5 to 2,000 ms (can be set in 0.5 ms intervals) | ||
| Program Capacity | 260 K steps (1,040 K bytes) | ||
| Memory Capacity | Program Memory (Drive 0) | 1,040 K bytes | |
| Memory Card (ROM) (Drive 2) | Installed SD / SDHC memory card capacity | ||
| Standard RAM (Drive 3) | 768 K bytes | ||
| Standard ROM (Drive 4) | 2,048 K bytes | ||
| Maximum File Storage Capacity | Program Memory | 252 pcs. | |
| Memory Card (ROM) | SD | Root Folder: Max. 511 pcs. Sub-directory: Max. 65,533 pcs. | |
| SDHC | Root Folder: Max. 65,534 pcs. Sub-directory: Max. 65,533 pcs. | ||
| Standard RAM | 4 pcs. | ||
| Standard ROM | 256 pcs. | ||
| Maximum Setting Number of Intelligent Function Unit Parameters | Initial Setting | 4,096 pcs. | |
| Refresh | 2,048 pcs. | ||
| Number of Input/Output Devices | 8,192 points (X/Y0 to 1FFF) | ||
| Number of Inputs/Outputs | 4,096 points (X/Y0 to FFF) | ||
| Number of Devices | Internal Relay [M] | Default 8,192 points (M0 to 8,191) (variable) | |
| Latch Relay [L] | Default 8,192 points (L0 to 8,191) (variable) | ||
| Link Relay [B] | Default 8,192 points (B0 to 1FFF) (variable) | ||
| Timer [T] | Default 2,048 points (T0 to 2,047) (Low-speed timer / High-speed timer shared) (variable) Low-speed timer / High-speed timer is specified by command Measurement unit of Low-speed timer / High-speed timer is set by a parameter (Low-speed timer: 1 to 1,000 ms, 1 ms interval, Default 100 ms) (High-speed timer: 0.1 to 100.0 ms, 0.1 ms interval, Default 10.0 ms) | ||
| Integration Timer [ST] | Default 0 point (Low-speed integration timer / High-speed integration timer shared) (variable) Low-speed integration timer / High-speed integration timer is specified by command Measurement unit of Low-speed integration timer / High-speed integration timer is set by a parameter (Low-speed integration timer: 1 to 1,000 ms, 1 ms interval, Default 100 ms) (High-speed integration timer: 0.1 to 100.0 ms, 0.1 ms interval, Default 10.0 ms) | ||
| Counter [C] | Normal counter: Default 1,024 points (C0 to 1,023) (variable) | ||
| Data Register [D] | Default 12,288 points (D0 to 12,287) (variable) | ||
| Expanded Data Register [D] | Default 131,072 points (D12,288 to 143,359) (variable) | ||
| Link Register [W] | Default 8,192 points (W0 to 1FFF) (variable) | ||
| Expanded Link Register [W] | Default 0 point (variable) | ||
| Annunciator [F] | Default 2,048 points (F0 to 2,047) (variable) | ||
| Edge Relay [V] | Default 2,048 points (V0 to 2,047) (variable) | ||
| File Register [R] | Standard RAM | 32,768 points (R0 to 32,767) Up to 393,216 points can be used by block switching | |
| File Register [ZR] | Standard RAM | 393,216 points (ZR0 to 393,215) Block switching is not necessary | |
| Link Special Relay [SB] | Default 2,048 points (SB0 to 7FF) (variable) | ||
| Link Special Register [SW] | Default 2,048 points (SW0 to 7FF) (variable) | ||
| Step Relay [S] | Default 8,192 points (S0 to 8,191) | ||
| Index Register / General-purpose Arithmetic Register [Z] | Max. 20 points (Z0 to 19) | ||
| Index Register [Z] (When 32-bit Qualification of ZR Device is Specified.) | Max. 10 points (Z0 to 18) (index register [Z] is used by double words) | ||
| Pointer [P] | 4,096 points (P0 to 4,095) (number of devices is fixed) Use range of local pointer / common pointer can be set by parameters | ||